1. Field of the Invention
The present invention relates to the technical field of processors and, more particularly, to a device and method for data protection by scrambling address lines in a processor.
2. Description of Related Art
Due to the importance of intellectual properties, manufactories usually scramble their intellectual property (IP), including data and programs, off-line for data protection and store the scrambled data in a non-volatile memory or storage medium, such that an unauthorized person cannot access the data even if he/she obtains the memory or storage medium with the scrambled data.
U.S. Pat. No. 6,408,073 granted to Hsu, et al. for an “Scramble circuit to protect data in a read only memory ” discloses a scramble circuit for protecting data stored in a read only memory by applying both a pseudo-random generator and an initial value seed1/seed2 to code ROM (Read Only Memory) data and thus generates encoded data. However, since the scrambling technology uses random numbers as parameters, such a data protection method requires a synchronous random generator for decoding. Thus program codes cannot be executed directly on such a ROM protected by this method, because any branch or jump in a program may dynamically change the decoding sequence. For example, FIG. 1 shows an exemplary set of program codes that are encrypted by sequential random numbers and stored in a ROM from 1F00—0000 H to 1F00—0020H. When a processor executes the program codes directly, a conditional branch may lead to a problem. That is, after the processor executes the third instruction (i.e., instr #3 of FIG. 1) representing bz 1F00—0020H at address 1F00—000CH, it may jump to address 1F00—0020H for next execution in accordance with the content of zero flag. However, on one hand, data stored in address 1F00—0020H results in encoding with a number ‘78’ generated by applying a pseudo random generator 20 to instr #8 of FIG. 1, and on the other hand, the processor decodes data stored in address 1F00—0020H using value 60 generated by the pseudo random generator at this moment, instead of the value ‘78’ in the encoding process. Accordingly, the program is not executed properly due to the cited error, even the processor may stall. Therefore, applying a random generator or pseudo random generator can protect ROM data only, not for RAN (Random Access Memory), Flash and the like.
To solve the problem, U.S. Pat. No. 5,943,283 granted to Wong, et al. for an “Address scrambling in a semiconductor memory” uses address scrambling to convert sequential input addresses into non-sequential physical addresses, thus achieving data protection for RAM or Flash. However, if the stored data has significant sequencing pattern (e.g., Boot-up Strap procedure for a processor, or common function tables), data protection used can easily be cracked by guessing data disposition.
Therefore, it is desirable to provide an improved data protection method to mitigate and/or obviate the aforementioned problems.